Chips, designed
at Texas.

First student silicon team at UT Austin, designing an AI inference accelerator targeting TSMC 16nm.

Supported by

Silicon is the new frontier. We're training people who'll shape it.

Flagship

Introducing Lambda.

Longhorn Accelerator for Matrix-Based Dataflow & Attention. Powering AI models up to 1.5B parameters

Tapeout

Built for real silicon.

Targeting tapeout via the TSMC University FinFET Program with imec.

FRONTEND

SystemVerilog · Formal

Backend

Cadence · Synopsys

Nodes

TSMC 16nm

Vision

01
Spring 2026
Charter & Tooling
Secure industry-grade EDA stack and establish versioned RTL and verification infrastructure.
02
Fall 2026
Architecture Lock
Define target workloads, finalize microarchitecture, and lock the system-level specification.
03
Spring 2027
RTL Freeze
Feature-complete accelerator RTL with full design verification signoff.
04
Summer 2027
Tapeout
GDSII submission with LVS and DRC clean on TSMC 16nm.
05
Post-silicon
Bring-up
Silicon validation, board-level bring-up, and first on-chip inference.

We're looking for intrinsically motivated, intelligent students, plus industry partners and faculty willing to support.